Short presentation

Vincent Beroulle received an Engineer Degree from the National Polytechnical Institute of Grenoble (INPG) in 1996, and a Master Degree and a Ph.D in Microelectronics from the University of Montpellier II, respectively in 1999 and 2002. He is currently Professor at the Grenoble Institute of Technology. He is head of the LCIS laboratory. His main interest concerns security and safety of complex integrated circuits and systems. In particular, his work deals with fault modeling and fault injection with emulation platforms with a specific focus on IoT and RFID technologies.

Research activities : Security and Safety of Integrated Systems

Keywords: Fault Modeling, Fault injection, FPGA Prototyping, Verification, Test

Applications: SoC, RFID, IoT, Critical Systems, …

CURRENT PROJECTS

• POP Project (ANR funding): “Power-OFF attacks on PUF”

Academic Partners: MSE (leader), TIMA, LHC, LCIS

• Coordinator “Cross Layer Fault Analysis for Microprocessor Architecture“

Academic Partner: LCIS (leader), TIMA, Verimag

• DETOXIO-S Project LCIS head (AURA Region funding), « Security evaluation of a FPGA-based application »

Industrial Partners: Serenicity (leader), Clesse, Grenoble INP Esisar

• ARSENE Project (PEPR Cyber), « Secure Architectures for Embedded Digital Systems »

Academic Partners: CEA (leader), INRIA, IMT, TIMA, LabSTICC, LIRMM, Verimag, LCIS…

PAST PROJECTS

• ANACONDA Project LCIS co-head (AURA Region funding), « Automated Cybersecurity Analysis with non Intrusive tools »

Industrial Partners: Ponant technologies (Leader), Rtone

Academic Partners: LCIS (leader), Grenoble Esisar

• Safe-RFID Project Coordinator (ANR JCJC funding): “Dependability and Security of RFID Systems”

Dependability improvement of RFID systems

Vulnerability analysis of RFID systems

RFID Systems Model for Fault Simulation

• ANR LIESSE project “Laser-Induced fault Effects in Security-dedicated circuitS”

Industrial Partner: ST Microelectronics

Academic Partners: LIRMM (Leader), LCIS, TIMA, ENSME, ONERA

• Safe-Air Project Coordinator (AURA Region funding): “Safety Evaluation of Aircraft Systems using Virtual Platforms”

Industrial Partners: Thales Valence, AEDvices consulting

Academic Partners: LCIS (leader), TIMA, LHC

CURRENT PH.D. SUPERVISION

• Ihab ALASHAER, “Cross-layer Fault Analysis on Microprocessor Architecture”, November 2020
• Hiep Manh DO, “Design of Secure Tags using ECC”, December 2019
• Aghiles DAOUDI (in TIMA), “Design and evaluation of countermeasures against power-o_ laser fault injection attacks”, October 2022
• Quentin JAYET (in CEA Leti), “Proof of elapsed time for secure and low power embedded systems”, December 2022

PREVIOUS PH.D. SUPERVISION

• Amir ALI POUR, « Machine Learning for Modeling of PUF », oral defense December 2022
• Nikolaos Foivos POLYCHONOUS, « Supervisor Design for Critical Embedded Systems », oral defense January 2023
• Zahra KAZEMI, “Fault Injection Attacks on Embedded Applications: Characterization and Evaluation”, oral defense February 2022
• Julie ROUX, “Evaluation de la robustesse de systèmes critiques par analyse cross-layer“, thèse soutenue le 7 janvier 2022
• Baptiste PESTOURIE, “UWB based Secure ranging and LOCalization“, thèse soutenue le 4 Décembre 2020, vidéo soutenance
• Johan LAURENT, “Modélisation de fautes utilisant la description RTL de microarchitectures pour l’analyse de vulnérabilité conjointe matérielle-logicielle”, thèse soutenue le 19 Novembre 2020, manuscrit, soutenance, vidéo soutenance
• Arash NEIJAT, “Détection de chevaux de Troie matériel combinée aux méthodes d’obfuscation” (2014-2019), soutenue le 25 Janvier 2019,
• Jérémy DUBEUF, “Etude et implémentation de contre-mesures matérielles pour la protection de dispositifs cryptographiques à base de courbes elliptiques” (2015-2018), CIFRE Maxim Integrated
• Athanasios PAPADIMITRIOU, “Modélisation au niveau RTL des attaques laser et Emulation pour l’évaluation de contre-mesures” (2012-2015), Projet ANR LIESSE
• Omar ABDELMALEK, “Conception et prototypage d’une architecture de tag UHF robuste” (2011-2015), Projet ANR SafeRFID
• Noémie BOHER, “Analyse, modélisation et conception de circuits analogiques de gestion de sécurité embarquée sur procédé CMOS”, (2012-2015), Thèse CIFRE STMicroelectronics
• Gilles FRITZ, “Méthode de monitoring pour la détection en ligne des défauts dans les systèmes RFID“, soutenue le 10 décembre 2012
• Youssef SERRESTOU, “Optimisation de la qualité de la vérification fonctionnelle par analyse de mutation”, soutenue le 8 décembre 2008
• Tu TRAN XUAN, thèse effectuée au CEA-LETI , “Méthode de test et conception en vue du test pour les réseaux sur puce asynchrones : application au réseau ANOC”, soutenue le 12 février 2008.
• Yves JOANNON, CIFRE ST Microelectronics, « Qualification et génération automatique de stimuli pour le test de systèmes sur puces (SoC) analogiques mixtes et RF ». soutenue le 11 avril 2008.
• Rami KHOURI,”Modélisation comportementale en VHDL-AMS du lien RF pour la simulation et l’optimisation des systèmes RFID UHF et micro-ondes“,soutenue le 28 mai 2007.

FULL PUBLICATION LIST

List is available here

Teaching activities : Professor in Embedded System Security & Safety

Keywords: Digital Design, VHDL, FPGA, Functional Verification, Safety, Security

Responsible of the following courses:

• Advanced Digital Architecture Design
• Verification and Test of Secure Embedded Systems
• Design of Analog and Mixed Systems

Coordinator of EMNESS ERASMUS+ Cooperation Partnership Project “European Master Network On Embedded System Security and Safety”

Academic Partners: University of Stuttgart, University of Freiburg, University of Pireaus, University of Barcelona (UPC), Politechnico de Torino, Grenoble INP Phelma