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Vincent Beroulle

Lcis Laboratory Director

Professor Grenoble INP-UGA Esisar

CTSYS team

Portrait Vincent Beroulle

Short presentation

Vincent Beroulle received an Engineer Degree from the National Polytechnical Institute of Grenoble (INPG) in 1996, and a Master Degree and a Ph.D in Microelectronics from the University of Montpellier II, respectively in 1999 and 2002. He is currently Professor at the Grenoble Institute of Technology. He is head of the LCIS laboratory. His main interest concerns security and safety of complex integrated circuits and systems. In particular, his work deals with fault modeling and fault injection with emulation platforms with a specific focus on IoT and RFID technologies.

 

Research activities : Security and Safety of Integrated Systems

 

Keywords: Fault Modeling, Fault injection, FPGA Prototyping, Verification, Test

Applications: SoC, RFID, IoT, Critical Systems, …

CURRENT PROJECTS

  • POP Project (ANR funding): “Power-OFF attacks on PUF”

Academic Partners: MSE (leader), TIMA, LHC, LCIS

Academic Partner: LCIS (leader), TIMA, Verimag

  • DETOXIO-S Project LCIS head (AURA Region funding), « Security evaluation of a FPGA-based application »

Industrial Partners: Serenicity (leader), Clesse, Grenoble INP Esisar

  • ARSENE Project (PEPR Cyber), « Secure Architectures for Embedded Digital Systems »

Academic Partners: CEA (leader), INRIA, IMT, TIMA, LabSTICC, LIRMM, Verimag, LCIS…

PAST PROJECTS

  • ANACONDA Project LCIS co-head (AURA Region funding), « Automated Cybersecurity Analysis with non Intrusive tools »

Industrial Partners: Ponant technologies (Leader), Rtone

Academic Partners: LCIS (leader), Grenoble Esisar

  • Safe-RFID Project Coordinator (ANR JCJC funding): “Dependability and Security of RFID Systems”

Dependability improvement of RFID systems

Vulnerability analysis of RFID systems

RFID Systems Model for Fault Simulation

  • ANR LIESSE project “Laser-Induced fault Effects in Security-dedicated circuitS”

Industrial Partner: ST Microelectronics

Academic Partners: LIRMM (Leader), LCIS, TIMA, ENSME, ONERA

  • Safe-Air Project Coordinator (AURA Region funding): “Safety Evaluation of Aircraft Systems using Virtual Platforms”

Industrial Partners: Thales Valence, AEDvices consulting

Academic Partners: LCIS (leader), TIMA, LHC

CURRENT PH.D. SUPERVISION

  • Ihab ALASHAER, “Cross-layer Fault Analysis on Microprocessor Architecture”, November 2020
  • Hiep Manh DO, “Design of Secure Tags using ECC”, December 2019
  • Aghiles DAOUDI (in TIMA), “Design and evaluation of countermeasures against power-o_ laser fault injection attacks”, October 2022
  • Quentin JAYET (in CEA Leti), “Proof of elapsed time for secure and low power embedded systems”, December 2022

PREVIOUS PH.D. SUPERVISION

FULL PUBLICATION LIST

List is available here

 

Teaching activities : Professor in Embedded System Security & Safety

 

Keywords: Digital Design, VHDL, FPGA, Functional Verification, Safety, Security

Responsible of the following courses:

  • Advanced Digital Architecture Design
  • Verification and Test of Secure Embedded Systems
  • Design of Analog and Mixed Systems

Coordinator of EMNESS ERASMUS+ Cooperation Partnership Project “European Master Network On Embedded System Security and Safety”

Academic Partners: University of Stuttgart, University of Freiburg, University of Pireaus, University of Barcelona (UPC), Politechnico de Torino, Grenoble INP Phelma